The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 04, 1983

Filed:

Dec. 29, 1981
Applicant:
Inventors:

Kei Kurosawa, Tokyo, JP;

Tadashi Shibata, Yokohama, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
427 39 ; 148-15 ; 156643 ; 156649 ; 156653 ; 156657 ; 1566591 ; 2041 / ; 427 85 ; 427 93 ; 427 94 ; 427 95 ; 427 96 ; 427259 ;
Abstract

A method of forming a flat field region in a semiconductor substrate, which comprises forming a recess in the substrate, forming a covering on the whole surface of the substrate with a first insulating film such as plasma CVD SiO.sub.2 film which gives a layer at the side portion of the recess more rapidly etchable as compared with other portions, selectively removing the layer at the side portion to thereby form a V-shaped groove between the side of the recess and the first insulating film, and filling the V-shaped groove with a second insulating material so as to obtain a flat field region which is flush with the surface of an element-forming re


Find Patent Forward Citations

Kurosawa, Kei. (1983). Method for manufacturing semiconductor device (U.S. Patent No. 4407851). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/4407851

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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