The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 23, 1983

Filed:

Mar. 25, 1982
Applicant:
Inventors:

Gerald A Coquin, New Providence, NJ (US);

Joseph M Moran, Berkeley Heights, NJ (US);

Gary N Taylor, Bridgewater, NJ (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ; B44C / ; C03C / ; C03C / ;
U.S. Cl.
CPC ...
156643 ; 156345 ; 156646 ; 1566591 ; 2041 / ; 204298 ; 430313 ;
Abstract

In a plasma-assisted dry etching process designed to pattern VLSI devices, a relatively high and uniform etch rate exhibiting low contamination is achieved over the entire surface extent of each wafer to be etched. This is accomplished by mounting the wafers in a unique fashion on one of two spaced-apart electrodes in the reaction chamber of a dry etching system. In particular, the front surface of each wafer is maintained in substantially the same plane as that of surrounding dielectric material. Additionally, the thickness of the surrounding dielectric material is designed to be considerably greater than the thickness of any dielectric material in contact with the back surface of each wafer. In that way, the entire front surface extent of each wafer is influenced by a relatively uniform electric field. Moreover, the available field in the chamber is in effect focussed onto the wafer surfaces, thereby achieving a relatively high etch rate characterized by low contamination.


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