The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 01, 1983

Filed:

Sep. 03, 1980
Applicant:
Inventors:

Rokuro Yoshizawa, Neuss, DE;

Satoshi Shinozaki, Yokohama, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ;
U.S. Cl.
CPC ...
156653 ; 156656 ; 156657 ; 1566591 ; 156662 ; 430314 ;
Abstract

A method of manufacturing a semiconductor device comprising a step of covering a principal surface of a semiconductor substrate having semiconductor regions formed therein and at least partly provided with a silicon oxide film with a cover film having an etching characteristic different from that of the oxide film, a step of forming a first deposition layer having a higher etching speed than that of the cover layer on the cover layer, a step of forming a second deposition layer having a lower etching speed than that of the first deposition layer on the first deposition layer, a step of etching away portions of the second and first deposition layers and cover layer corresponding to a wiring pattern in succession, a step of etching the exposed portions of the silicon oxide film with the cover layer having the openings as a mask to thereby form contact holes with respect to the semiconductor substrate, and a step of forming wiring leads by depositing a wiring metal and etching away the first deposition layer and thus lifting off the second deposition layer and wiring metal portions thereon.


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