The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 18, 1983
Filed:
Feb. 06, 1981
Hideaki Isogai, Higashikurume, JP;
Fujitsu Limited, Kawasaki, JP;
Abstract
A decoder circuit which receives a plurality of address signals and selects one of the n.times.m word lines for driving a semiconductor memory device. The decoder circuit includes a high level selection circuit which receives the upper address signals and produces n outputs, one of the n outputs is selected to be a high level, while the other (n-1) outputs are rendered at a low level. The decoder circuit also includes a low level selection circuit which receives the lower address signals and produces m outputs, one of the m outputs is selected to be the low level, while the other (m-1) outputs are rendered at the high level. The decoder circuit additionally includes n.times.m coupling circuits each of which receives one output from the high level selection circuit and one output from the low level selection circuit and which corresponds to one of the n.times.m word lines. Each of the coupling circuit selects the corresponding word line when the high level output from the high level selection circuit and the low level output from the low level selection circuit are simultaneously applied to the coupling circuit.