The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 27, 1982

Filed:

Jun. 27, 1980
Applicant:
Inventors:

George A Caccoma, Poughkeepsie, NY (US);

Joseph H Koestner, Hopewell Junction, NY (US);

Brian C O'Neill, Millbrook, NY (US);

Frank M Tappen, Plantation, FL (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
364491 ; 29740 ; 29759 ; 29834 ; 2281 / ; 318640 ; 358101 ; 364559 ;
Abstract

A batch chip placement system for batch positioning semiconductor chips, or the like, upon a substrate containing an array of chip sites or footprints whose actual position on the substrate deviates from the theoretical or nominal position over successive substrates. The positioning is achieved by first sensing the X and Y offsets of a pair of alignment marks on the substrate from their theoretical or nominal position to determine the .DELTA.X and .DELTA.Y correction factors required to obtain the actual X,Y position of the alignment marks. The actual X,Y position of the alignment marks is used to determine actual X,Y chip position values, .theta. rotation and shrinkage factor corrections required to obtain proper orientation and positioning for batch chip placement.


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