Electrically resettable non-volatile memory for a fuse system

Abstract

A non-volatile memory has a plurality of storage bits, each bit comprising an insulated gate field effect transistor having a variable threshold voltage and selectively set to first and second stable threshold voltages in response to the application of positive and negative polarizing voltages between the gate and source thereof. The threshold voltage state of the transistor is determined by applying a read voltage having a magnitude greater than the first stable threshold voltage and less than the second stable threshold voltage, the transistor being activated only if it has assumed the first threshold voltage. Complementary addressing circuitry selectively and sequentially couples the data bits of a serial data word, received at a data terminal, to corresponding memory bits for storage in the memory. The memory bits are initially cleared by applying a positive polarizing voltage to the transistors to set them to the first stable threshold state. The addressing circuitry selectively applies a negative polarizing voltage to the transistors to set them to the second stable threshold state in accordance with the data word. The addressing circuitry also provides for interrogation of the memory by applying a read voltage to the bits in sequence and coupling the bits to the data terminal. A fire command generated by the firing of a projectile, such as an artillery shell, transfers the information in the memory to a counter. The counter is then operated at a predetermined clock rate until overflow occurs for generating a signal for detonating the explosive projectile.