Multi-channel charge coupled transfer device

Abstract

An electrode per bit (E/B) structure type charge transfer device in which N storage cell each consisting of a barrier region and a storage region are driven by N-phase clocks, one of N storage cells being empty and the remaining N-1 cells storing signal charge packets. The N-phase clocks are biased to a low level for storage and pulsed to a high level for transfer. The N storage cells are successively rendered in the transfer mode in the direction opposite to the charge transfer direction so that the empty cell is shifted to the adjacent preceding cell in the direction opposite to the charge transfer direction every time each of the N-phase clocks is pulsed. After one cycle of the N-phase clocks, all the signal charge packets are shifted to the succeeding cells respectively. A multiplexed electrode per bit (ME/B) structure type charge transfer device also is disclosed which employs the E/B structure and is operable by the clocks with small number of phases, providing a CCD memory with a large capacity.