The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 29, 1980

Filed:

Mar. 12, 1979
Applicant:
Inventors:

Wolf-Dieter Munz, Freigericht, DE;

Siegfried Bock, Munich, DE;

Hans W Potzlberger, Munich, DE;

Assignee:

Siemens Aktiengesellschaft, Berlin and Munich, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
C25D / ; C25D / ; H01C / ; H05K / ;
U.S. Cl.
CPC ...
204 15 ; 29620 ; 29847 ; 1566611 ; 204 / ; 361402 ;
Abstract

A method is disclosed for producing an electric thin layer circuit comprising at least one capacitor and a conductor path and/or a resistor. The number of masks required for the production of such a thin layer circuit is reduced. First and second layers of tantalum-aluminum alloy where the second layer has a tantalum share lower than the first, are applied on an insulating base. In a first masking and etching technique, areas of the first and second layers are etched off outside the circuit elements. At least the second layer is anodically oxidized and the anodically oxidized surface is covered with a silicon dioxide layer so as to form a two layer dielectric for the capacitor. In a second masking and etching technique, not-required areas of the silicon dioxide layer external to the capacitor are removed. By utilizing the silicon dioxide layer remaining as an etching mask, the not-required areas of the tantalum-aluminum oxide layer and the second tantalum-aluminum layer external to the capacitor are removed. In a third etching and masking technique, a conductive surface layer is applied over the silicon dioxide layer at the capacitor element to form a two-layer dielectric capacitor and over the first tantalum-aluminum layer to form the conductor path.


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