The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 30, 1979

Filed:

Oct. 14, 1977
Applicant:
Inventor:

John M Frusco, Scotch Plains, NJ (US);

Assignee:

Plessey Incorporated, Montvale, NJ (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ; H01L / ;
U.S. Cl.
CPC ...
357 70 ; 357 68 ; 357 74 ; 357 80 ; 29588 ;
Abstract

A stamped, 40-lead ceramic dual-in-line package (Cer-Dip) frame is disclosed. Increased usage and lowered costs of large scale, integrated circuits (LSI) for microprocessor and similar applications has created a demand for precision ceramic packaging of the forty-lead dual-in-line type that is adapted for automated chip insertion in high-volume and at a low cost. The present invention meets this need with a stamped lead frame wherein the longest and most fragile leads are held in precise spatial relation by means of break-off tabs. After embedment of the leads on the ceramic substrate with a glass composition, the tabs are broken and removed. Forming, scoring and bending of the tabs are carried out as an integral part of the progressive stamping operation. Lead frames according to the invention replace much more expensive etched parts. The invention may be applied in a variety of packages.


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