The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 20, 1978

Filed:

Jan. 31, 1977
Applicant:
Inventors:

William H Owen, III, Mountain View, CA (US);

Kim R Kokkonen, Sunnyvale, CA (US);

Richard D Pashley, Sunnyvale, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
365227 ; 307D / ; 307264 ;
Abstract

An integrated circuit, metal-oxide-semiconductor (MOS) static random-access memory (RAM) with a power-down mode is described. The bistable memory cells employed in the memory include low conductivity, depletion mode transistors used as loads. 'Zero' threshold voltage devices are employed on a low body-effect substrate to permit the powering-down of many circuits in the memory without affecting circuit performance. Several circuits employing these zero threshold devices are described.


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