The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 31, 1978

Filed:

Nov. 29, 1976
Applicant:
Inventor:

Ronald William Knepper, La Grangeville, NY (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K / ; H03K / ; H03K / ; H03K / ;
U.S. Cl.
CPC ...
307270 ; 307205 ; 307246 ; 307251 ; 307D / ;
Abstract

Disclosed is a field effect transistor (FET) driver circuit capable of full supply voltage signal swings and high switching speeds while dissipating relatively little power. The output is obtained from a node between two series connected enhancement mode devices. The first of these series connected enhancement mode devices receives an input signal at its gating electrode, while the second of this pair of series connected devices has its gating electrode capacitively coupled to the output node through a first gatable depletion mode device. The first depletion mode device is in a series electrical path with a second depletion mode device and an enhancement mode device. The second depletion mode device and the enhancement mode device in series therewith receive the same phase of the input signal as the gate of said one series connected output transistor while the first gated depletion mode device is either self-biased or gets a gating input that is out of phase therewith. A depletion mode device in parallel with one of the series connected enhancement mode output devices maintains the output node at a full supply voltage level.


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