Mos dynamic random access memory having an improved sense and restore

Abstract

In a memory circuit, first and second bit line portions, each having a plurality of memory cells coupled thereto as provided for reading and writing electrical potentials into and out of the coupled memory cells. A bistable flip-flop type sensing amplifier is coupled between the first and second bit portion for sensing the voltage difference therebetween and for latching into one of the two states in response to sensing either a '0' or a '1' accessed to one of the bit line portions from an addressed memory cell to be read out of the memory. A high input impedance amplifier is provided between the respective bit line portion and the respective input terminal of the sensing amplifier for isolating (buffering) the stray capacitance of the sensing amplifier circuit from the capacitance of its bit line. Switchable restore circuitry bypasses each of the isolating line amplifiers for the purposes of restoring electrical potentials read out of the addressed memory cells. The restore timing signals for controlling the restore circuitry is derived from one of the outputs of the flip-flop sense amplifier so that the restore circuitry is self-timing and in addition power dissipation of the circuit is reduced because the time during which the bistable flip-flop draws signal current through the ON side thereof is reduced.