The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 06, 1977
Filed:
Dec. 23, 1975
Jan Hendrik DE Jonge, Beekbergen, NL;
Adrianus Josephus Smulders, Hoogland, NL;
U.S. Philips Corporation, New York, NY (US);
Abstract
The invention provides a compact test sequence for testing integrated memories. First, all storage positions are filled with the bit '0'. Subsequently, in a given order of the addresses, the '0' bit written for each address is read; immmediately thereafter a '1' bit is written in those bit positions. The positions are again tested by reading the '1' bits. When the last address of the predetermined order is reached, the '1' is read in the same order for each address. Subsequently a '0' is written, which is finally tested by reading again. When the last address is reached, all addresses are read in the reverse order, and a '1' is written, which is tested again. When the first address is reached, all addresses are read, filled with a '0' and tested. This process may be repeated as many times as there are bits in the address. The significance of the address bits are modified to form the predetermined order, for example, by cyclic rotation. For example, in the first cycle the order may be the normal order of successive addresses, while in the second cycle first all 'even' and then all 'odd' addresses are treated.