Injected charge capacitor memory

Abstract

A semiconductor memory produced in a unipolar technology includes a cell which has an inversion capacitor with one terminal connected to a bit/sense line, the other terminal is coupled to a source of charges by a pulse from a word line. The charges are produced from the source in the form of pulses injected into the capacitor. To provide a word organized array of these cells, each word includes a source of pulsed charges produced at the surface of a semiconductor substrate and a plurality of inversion capacitors are formed also at the surface of the semiconductor in spaced apart relationship from the charge source. Information is written into the capacitors by applying voltages of two different magnitudes, representing 1 and 0 bits of information, to one terminal of the capacitors while a word pulse produces inversion layers at the surface of the substrate between the capacitors to interconnect serially the pulsed charge source with each of the capacitors. The pulses of charge are timed so that they begin at least by the onset of the word pulse and terminate prior to the termination of the word pulse. Furthermore, prior to the termination of the word pulse, the voltage at the charge source is set to form a charge sink for draining excess charges. The capacitors having the larger voltage applied to the one terminal of the capacitors store the greater amount of charge. This charge can then be detected by measuring the voltage of the floating bit sense line when a word pulse again connects the charge source with each of the capacitors.