Analog-to-digital converter employing common mode rejection circuit

Abstract

An analog-to-digital converter of the single slope detection type comprising a first input terminal for receiving a first input signal formed by the superposition of a common mode noise voltage on a first DC voltage, a second input terminal for receiving a second input signal formed by the superposition of the common mode noise voltage on a second DC voltage, a ramp generator responsive to the second input signal and operative to separate the common mode noise voltage from the second input signal and to develop a ramp reference signal that is modulated by the common mode noise voltage, a first comparator for comparing the signals at the first terminal and at the output of the ramp generator and for developing a first output signal which changes state when the level of the modulated ramp reference signal exceeds the level of the first input signal, a second comparator for comparing the signals at the second terminal and at the output of the ramp generator and for developing a second output signal which changes state when the level of the modulated ramp reference signal exceeds the level of the second input signal, and a logic circuit responsive to the first and second output signals and operative to produce a pulse having a duration that corresponds to the time difference between the changes of state of the first and second output signals and operative to produce a pulse having a duration that corresponds to the time difference between the changes of state of the first and second output signals, such duration being indicative of the voltage difference between the first input signal and the second input signal. CROSS-REFERENCE TO RELATED APPLICATION