The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 07, 1976

Filed:

Apr. 24, 1972
Applicant:
Inventors:

William R Morcom, Indian Harbour Beach, FL (US);

Thomas J Sanders, Indialantic, FL (US);

Assignee:

Harris Corporation, Cleveland, OH (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
C23F / ; H01L / ;
U.S. Cl.
CPC ...
156-3 ; 29580 ; 148187 ; 156 11 ; 156 13 ; 156 17 ; 357 50 ;
Abstract

Isolation of device locations in a monolithic semiconductor integrated circuit is provided by depositing a thin film effective as a polishing stop on a planar surface of the semiconductor body in which the devices are to be fabricated, etching isolation grooves into the body through the thin film, coating the surfaces of the grooves and the film with an insulator layer, and growing polycrystalline material over the insulator layer to fill the grooves. The polycrystalline material in excess of that required to fill the grooves, and any insulator layer covering the planar surface of the thin film, are polished away without affecting the underlying planar surface of the semiconductor body, because the thin film is adapted to withstand polishing without damage. Finally, the thin film is stripped away leaving semiconductor islands having a planar surface and isolated by insulator layer-polycrystalline material filled moats. Devices are fabricated in these islands.


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