The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 10, 2026
Filed:
Jun. 25, 2024
Applicant:
Nexperia B.v., Nijmegen, NL;
Inventors:
Vegneswary Ramalingam, Seremban, MY;
Hans-Juergen Funke, Hamburg, DE;
Assignee:
Nexperia B.V., Nijmegen, NL;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10W 70/40 (2026.01); H10W 40/22 (2026.01); H10W 70/04 (2026.01); H10W 74/01 (2026.01); H10W 74/10 (2026.01); H10W 90/00 (2026.01);
U.S. Cl.
CPC ...
H10W 70/429 (2026.01); H10W 40/228 (2026.01); H10W 70/041 (2026.01); H10W 70/466 (2026.01); H10W 74/016 (2026.01); H10W 74/111 (2026.01); H10W 90/811 (2026.01); H10W 74/10 (2026.01); H10W 90/754 (2026.01); H10W 90/764 (2026.01);
Abstract
The present disclosure relates to a method for manufacturing semiconductor package assembly that includes a semiconductor package and a molding resin case. The present disclosure further provides an improved semiconductor package assembly capable of suppressing failures to limitations in package size.
Quick Actions:
Ramalingam, Vegneswary. (2026). Method for manufacturing a semiconductor package assembly as well as a semiconductor package assembly obtained with this method (U.S. Patent No. 12796485). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12796485
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile