The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 10, 2026

Filed:

Dec. 15, 2022
Applicant:

Semiconductor Components Industries, Llc, Phoenix, AZ (US);

Inventors:

Alexander Viktorovich Bolotnikov, Niskayuna, NY (US);

Jimmy Robert Hannes Franchi, Enkoeping, SE;

Krister Gumaelius, Vaxholm, SE;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 30/83 (2025.01); H10D 12/01 (2025.01); H10D 62/832 (2025.01); H10P 30/22 (2026.01);
U.S. Cl.
CPC ...
H10D 30/831 (2025.01); H10D 12/031 (2025.01); H10D 62/8325 (2025.01); H10P 30/22 (2026.01);
Abstract

A JFET transistor device having a reduced pitch may be manufactured using self-alignment techniques, while avoiding misalignments that may lead to decreased breakdown voltage and/or increased R. Consequently, described devices provide, for a given active area and gate voltage, additional current channels, increased current, and reduced R, as compared to conventional devices, while retaining high BVvalues.


Find Patent Forward Citations

Quick Actions:

Bolotnikov, Alexander. (2026). Self-aligned jfet device (U.S. Patent No. 12796007). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12796007

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Loading…