The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 10, 2026

Filed:

Aug. 21, 2023
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Jer-Fu Wang, Taipei City, TW;

Hung-Li Chiang, Taipei City, TW;

Goutham Arutchelvan, Hsinchu County, TW;

Wei-Sheng Yun, Taipei City, TW;

Chao-Ching Cheng, Hsinchu City, TW;

Iuliana Radu, Hsinchu County, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 30/67 (2025.01); H10D 30/43 (2025.01); H10D 62/10 (2025.01); H10D 62/80 (2025.01); H10D 64/62 (2025.01); H10D 99/00 (2025.01);
U.S. Cl.
CPC ...
H10D 30/6757 (2025.01); H10D 30/43 (2025.01); H10D 30/6729 (2025.01); H10D 30/6735 (2025.01); H10D 62/121 (2025.01); H10D 62/80 (2025.01); H10D 64/62 (2025.01); H10D 99/00 (2025.01); H10D 62/882 (2025.01);
Abstract

A semiconductor device structure and a manufacturing method thereof are provided. The semiconductor device structure includes a substrate, complex two-dimensional material layers disposed over the substrate, a gate structure and source and drain regions. The complex two-dimensional material layers are arranged spaced apart from one each other and in parallel to one another. The gate structure is disposed across and wraps around and surrounds first portions of the complex two-dimensional material layers. The source and drain regions are disposed on opposite sides of the gate structure and wrap around and surround second portions of the complex two-dimensional material layers.


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Wang, Jer-Fu. (2026). Semiconductor device and manufacturing method thereof (U.S. Patent No. 12796004). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12796004

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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