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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 12795932 B1

PDFFull Text
Date of Patent:
Nov. 10, 2026

Filed:

Mar. 01, 2024

Semiconductor device and manufacturing method thereof

Applicant:

Kioxia Corporation, Tokyo, JP;

Inventors:

Hiroyuki Yamashita, Yokkaichi Mie, JP;

Tatsunori Isogai, Yokkaichi Mie, JP;

Masaki Noguchi, Yokkaichi Mie, JP;

Junichi Kaneyama, Yokkaichi Mie, JP;

Shin Ishimatsu, Yokkaichi Mie, JP;

Daisuke Nishida, Mie Mie, JP;

Tomoyuki Takemoto, Nagoya Aichi, JP;

Wataru Matsuura, Yokkaichi Mie, JP;

Assignee:

KIOXIA CORPORATION, Tokyo, JP;

Attorney:

Foley & Lardner LLP

Primary Examiner:

Steven M Page

Int. Cl.
CPC ...
H10B 43/35 (2023.01); H10B 43/27 (2023.01);
U.S. Cl.
CPC ...
H10B 43/35 (2023.02); H10B 43/27 (2023.02);
Abstract

A semiconductor device includes a stack including a conductor layer and an insulator layer, a block insulating layer, a channel layer, a charge storage layer provided between the block insulating layer and the channel layer, and a tunnel layer provided between the charge storage layer and the channel layer, where the charge storage layer includes a first charge storage layer containing Si, N and at least one of Al, Mo, Nb, Hf, Zr, Ti, B, or P, a second charge storage layer containing Si and N, in which Si is contained at a second concentration higher than a first concentration that is a concentration of Si in the first charge storage layer, and provided between the first charge storage layer and the tunnel layer, and a dielectric layer containing at least one of silicon oxynitride (SiON), silicon oxycarbonitride (SiOCN), or aluminum oxide (AlOx), and provided between the first charge storage layer and the second charge storage layer.

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Yamashita, Hiroyuki. (2026). Semiconductor device and manufacturing method thereof (U.S. Patent No. 12795932). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12795932

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