The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 03, 2026

Filed:

Sep. 14, 2023
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Jihun Jung, Suwon-si, KR;

Unbyoung Kang, Suwon-si, KR;

Yeongkwon Ko, Suwon-si, KR;

Seunghun Shin, Suwon-si, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10W 90/00 (2026.01); H10B 80/00 (2023.01); H10W 20/20 (2026.01); H10W 74/10 (2026.01);
U.S. Cl.
CPC ...
H10W 90/00 (2026.01); H10B 80/00 (2023.02); H10W 20/20 (2026.01); H10W 74/141 (2026.01); H10W 90/792 (2026.01);
Abstract

A semiconductor chip including a semiconductor substrate having an active surface and a non-active surface opposite to each other, a plurality of through electrodes passing through the semiconductor substrate, a plurality of wiring structures on the active surface and electrically connected to the plurality of through electrodes, an inter-wire insulating layer surrounding the plurality of wiring structures, a plurality of front chip connection pads electrically connected to the plurality of wiring structures, a front insulating layer surrounding the plurality of front chip connection pads, on the inter-wire insulating layer, a plurality of rear chip connection pads disposed on the non-active surface and electrically connected to the plurality of through electrodes, and a rear insulating layer surrounding the plurality of rear chip connection pads, on the non-active surface, wherein the front insulating layer includes a cover insulating portion covering a side surface of the inter-wire insulating layer may be provided.


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Jung, Jihun. (2026). Semiconductor chip and semiconductor package including the same (U.S. Patent No. 12787879). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12787879

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