The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 03, 2026

Filed:

Jan. 08, 2024
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Wen Wei Lum, Singapore, SG;

Kelvin Aik Boo Tan, Singapore, SG;

Seng Kim Ye, Singapore, SG;

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10W 90/24 (2026.01); H10B 80/00 (2023.01); H10W 70/05 (2026.01); H10W 70/63 (2026.01); H10W 74/10 (2026.01); H10W 90/00 (2026.01); H10W 90/20 (2026.01); H10W 72/50 (2026.01);
U.S. Cl.
CPC ...
H10W 74/121 (2026.01); H10B 80/00 (2023.02); H10W 70/095 (2026.01); H10W 70/635 (2026.01); H10W 90/00 (2026.01); H10W 90/291 (2026.01); H10W 72/5522 (2026.01); H10W 72/5525 (2026.01); H10W 74/117 (2026.01); H10W 90/752 (2026.01); H10W 90/754 (2026.01);
Abstract

Implementations described herein relate to various semiconductor device assemblies. In some implementations, a molded memory device may include multiple stacked NAND dies electrically coupled to one another via multiple wire bonds. The molded memory device may include a molded casing surrounding the multiple stacked NAND dies and encapsulating the multiple wire bonds, with the molded casing including a first mold surrounding a first portion of a first NAND die, of the multiple stacked NAND dies, and a second mold partially surrounding a second portion of the first NAND die and each additional NAND die, of the multiple NAND dies. The molded memory device may include multiple copper contacts configured to couple the molded memory device to a substrate associated with a system in package, with the plurality of copper contacts being disposed in the first mold.


Find Patent Forward Citations

Quick Actions:

Lum, Wen. (2026). Molded memory assemblies for a system in package semiconductor device assembly (U.S. Patent No. 12787853). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12787853

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