The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 03, 2026
Filed:
Dec. 30, 2024
Tower Partners Semiconductor Co., Ltd., Uozu City, JP;
Tower Semiconductor Ltd., Migdal Haemek, IL;
Hiroshige Hirano, Nara, JP;
Hiroaki Kuriyama, Toyama, JP;
Atsushi Noma, Toyama, JP;
Evgeny Pikhay, Migdal Haemek, IL;
Yakov Roizin, Migdal Haemek, IL;
TOWER PARTNERS SEMICONDUCTOR CO., LTD., Uozu City, JP;
TOWER SEMICONDUCTOR LTD., Migdal Haemek, IL;
Abstract
A semiconductor memory device includes a plurality of memory cells formed on a semiconductor substrate. Each of the memory cells includes a first floating gate transistor (TFG), a second floating gate transistor (TFG), a first erasing element, a second erasing element, and a memory cell selection transistor. A gate of TFGis electrically coupled to a gate of the first erasing element. A gate of TFGis electrically coupled to a gate of the second erasing element. A source of TFGis electrically coupled to a drain of the memory cell selection transistor. A source of TFGis electrically coupled to the drain of the memory cell selection transistor or a drain of TFG
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile