The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 27, 2026

Filed:

Jan. 16, 2023
Applicant:

Vanguard International Semiconductor Corporation, Hsinchu, TW;

Inventors:

Yi-Wei Lien, Hsinchu City, TW;

Wei-Chih Cheng, Tainan City, TW;

Shyh-Chiang Shen, Taipei City, TW;

Hsin-Chang Tsai, Kaohsiung City, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 64/00 (2025.01); H10D 30/01 (2025.01); H10D 30/47 (2025.01); H10D 62/85 (2025.01); H10D 64/01 (2025.01);
U.S. Cl.
CPC ...
H10D 64/118 (2025.01); H10D 30/015 (2025.01); H10D 30/475 (2025.01); H10D 62/8503 (2025.01); H10D 64/01 (2025.01); H10D 64/112 (2025.01);
Abstract

A high electron mobility transistor includes a semiconductor channel layer and a semiconductor barrier layer disposed on a substrate. A source electrode, a gate electrode and a drain electrode are disposed on the semiconductor channel layer. A patterned dielectric layer is disposed on the semiconductor barrier layer, and between the gate electrode and the drain electrode. A first field plate is extended continuously from a side of the patterned dielectric layer to the top surface thereof, and has a step in height. A first dielectric layer is disposed between the semiconductor barrier layer and the patterned dielectric layer. A second dielectric layer covers the patterned dielectric layer. The dielectric constant of the patterned dielectric layer is higher than that of the first dielectric layer and the second dielectric layer.


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Lien, Yi-Wei. (2026). High electron mobility transistor and fabrication method thereof (U.S. Patent No. 12777700). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12777700

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