Semiconductor structure having both gate-all-around devices and planar devices

Abstract

A semiconductor structure includes a substrate and a first transistor and a second transistor disposed over the substrate. The first transistor includes vertically stacked multiple first channels and a first metal gate structure wrapping around the vertically stacked multiple first channels, and the second transistor includes vertically stacked multiple second channels and a second metal gate structure wrapping around the vertically stacked multiple second channels. The semiconductor structure further includes a dielectric structure sandwiched by the first metal gate structure and the second metal gate structure. The first metal gate structure and the second metal gate structure extend lengthwise along a direction. The first channels have a first width along the direction and the second channels have a second width along the direction, the second width less than the first width.