The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 27, 2026

Filed:

Jun. 27, 2022
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Yi-Ruei Jhan, Keelung City, TW;

Kuan-Ting Pan, Taipei City, TW;

Wei Ting Wang, Taipei City, TW;

Shi Ning Ju, Hsinchu City, TW;

Kuo-Cheng Chiang, Hsinchu County, TW;

Chih-Hao Wang, Hsinchu County, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10D 30/67 (2025.01); H10D 30/01 (2025.01); H10D 30/43 (2025.01); H10D 62/10 (2025.01); H10D 84/01 (2026.01); H10D 84/03 (2025.01); H10D 84/83 (2025.01);
U.S. Cl.
CPC ...
H10D 30/6735 (2025.01); H10D 30/014 (2025.01); H10D 30/43 (2025.01); H10D 30/6757 (2025.01); H10D 62/115 (2025.01); H10D 62/121 (2025.01); H10D 84/0151 (2025.01); H10D 84/0158 (2025.01); H10D 84/038 (2025.01); H10D 84/834 (2025.01);
Abstract

A method of manufacturing an integrated circuit device is provided. The method includes forming a semiconductor fin over a semiconductor substrate; forming an isolation structure surrounding the semiconductor fin; etching a trench in the semiconductor fin; forming a dielectric fin in the trench; after forming the dielectric fin, recessing a top surface of the isolation structure, such that the dielectric fin and the semiconductor fin protrude from the recessed top surface of the isolation structure; and forming a first metal gate structure and a second metal gate structure over the dielectric fin and the semiconductor fin, respectively.


Find Patent Forward Citations

Jhan, Yi-Ruei. (2026). Integrated circuit device and manufacturing method thereof (U.S. Patent No. 12777681). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12777681

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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