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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 12777632 B1

PDFFull Text
Date of Patent:
Oct. 27, 2026

Filed:

May. 26, 2022

Microelectronic devices including vertically stacked structures with distributed control logic regions, and related electronic systems and methods

Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventor:

Fatma Arzum Simsek-Ege, Boise, ID (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:

TraskBritt

Primary Examiner:

Steven B Gauthier

Assistant Examiner:

Candice undefined Chan

Int. Cl.
CPC ...
H10B 12/00 (2023.01); G11C 11/408 (2006.01); H05K 3/10 (2006.01); H10B 41/27 (2023.01); H10B 43/27 (2023.01); H10W 90/00 (2026.01);
U.S. Cl.
CPC ...
H10B 12/315 (2023.02); G11C 11/4087 (2013.01); H05K 3/103 (2013.01); H10B 41/27 (2023.02); H10B 43/27 (2023.02); H10W 90/00 (2026.01); H10W 90/792 (2026.01);
Abstract

A microelectronic device comprises a first microelectronic device structure and a second microelectronic device structure vertically neighboring the first microelectronic device structure. The first microelectronic device structure comprises a first memory array region and a first control logic device region and the second microelectronic device structure comprises a second memory array region and a second control logic device region. A third control logic device region vertically overlies the second microelectronic device structure. The first control logic device region includes sense amplifier devices for the first memory array region. The second control logic device region includes additional sense amplifier devices and sub word line drivers for the second memory array region. The third control logic device region includes additional sub word line drivers for the second memory array region. Related microelectronic devices, electronic systems, and methods are also described.

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Simsek-Ege, Fatma. (2026). Microelectronic devices including vertically stacked structures with distributed control logic regions, and related electronic systems and methods (U.S. Patent No. 12777632). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12777632

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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