The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 20, 2026

Filed:

Dec. 04, 2023
Applicant:

Changxin Memory Technologies, Inc., Hefei City, CN;

Inventor:

Kaimin Lv, Hefei City, CN;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H10W 90/00 (2026.01); H10P 72/70 (2026.01); H10W 74/15 (2026.01); H10W 90/20 (2026.01);
U.S. Cl.
CPC ...
H10W 90/00 (2026.01); H10P 72/74 (2026.01); H10P 72/7416 (2026.01); H10W 74/15 (2026.01); H10W 90/297 (2026.01); H10W 90/724 (2026.01); H10W 90/734 (2026.01);
Abstract

The present disclosure relates to the technical field of semiconductors and provides a semiconductor structure, a method of forming same, and a memory. The method of forming a semiconductor structure of the present disclosure includes: providing a carrier board; forming a chipset on one side of the carrier board, where the chipset includes multiple chips stacked in a direction perpendicular to the carrier board; where among multiple chips, an orthographic projection of a chip closer to the carrier board on the carrier board is within an orthographic projection of a chip farthest from the carrier board on the carrier board; forming an insulating dielectric layer covering the chipset; and performing a grinding process to expose a predetermined surface of the chip farthest from the carrier board outside the insulating dielectric layer.


Find Patent Forward Citations

Quick Actions:

Lv, Kaimin. (2026). Semiconductor structure with chipset including multiple chips, memory, and method of forming same (U.S. Patent No. 12772910). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12772910

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Loading…