The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 20, 2026
Filed:
May. 18, 2023
Samsung Electronics Co., Ltd., Suwon-si, KR;
Jun Yun Kweon, Suwon-si, KR;
Yeong Beom Ko, Suwon-si, KR;
Woo Ju Kim, Suwon-si, KR;
Jung Seok Ryu, Suwon-si, KR;
Hwa Young Lee, Suwon-si, KR;
Hyun Su Hwang, Suwon-si, KR;
SAMSUNG ELECTRONICS CO., LTD., Suwon-si, KR;
Abstract
A method for manufacturing semiconductor device includes preparing a semiconductor wafer including a first semiconductor substrate and a first through silicon via; removing a trim region of the first semiconductor substrate along an edge portion of the semiconductor wafer to form a remaining edge region; attaching the semiconductor wafer to a carrier substrate, wherein the remaining edge region is in contact with the carrier substrate; forming an edge protection layer along the remaining edge region; exposing the first through silicon via by removing a predetermined depth of the first semiconductor substrate; forming a second final passivation layer to expose the upper surface of the first through silicon via; forming a plurality of first upper connection pads on the second final passivation layer; and dicing the semiconductor wafer into a plurality of first semiconductor chips.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile