The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 20, 2026
Filed:
Sep. 25, 2022
Applicant:
United Microelectronics Corp., Hsin-Chu City, TW;
Inventor:
Chih-Tung Yeh, Taoyuan City, TW;
Assignee:
UNITED MICROELECTRONICS CORP., Hsin-Chu City, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 30/01 (2025.01); H10D 30/47 (2025.01); H10D 30/67 (2025.01); H10D 62/824 (2025.01); H10D 62/85 (2025.01); H10D 64/01 (2025.01); H10D 64/64 (2025.01);
U.S. Cl.
CPC ...
H10D 64/01 (2025.01); H10D 30/015 (2025.01); H10D 30/475 (2025.01); H10D 30/6738 (2025.01); H10D 30/675 (2025.01); H10D 62/824 (2025.01); H10D 62/85 (2025.01); H10D 62/8503 (2025.01); H10D 64/64 (2025.01);
Abstract
A method for fabricating a high electron mobility transistor (HEMT) includes the steps of forming a buffer layer on a substrate, forming a barrier layer on the buffer layer, forming a p-type semiconductor layer on the barrier layer, performing an ion implantation process to form a hole injection buffer layer (HIBL) on the p-type semiconductor layer, and then forming a gate electrode on the HIBL.
Quick Actions:
Yeh, Chih-Tung. (2026). Method for fabricating high electron mobility transistor (U.S. Patent No. 12772526). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12772526
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile