The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 20, 2026
Filed:
Dec. 01, 2022
Csmc Technologies Fab2 Co., Ltd., Wuxi, CN;
Chaoqi Xu, Wuxi, CN;
Shuxian Chen, Wuxi, CN;
Chunxia MA, Wuxi, CN;
Yi Zhang, Wuxi, CN;
Penglong Xu, Wuxi, CN;
Feng Lin, Wuxi, CN;
Ruibin Cao, Wuxi, CN;
CSMC TECHNOLOGIES FAB2 CO., LTD., Wuxi, CN;
Abstract
In a manufacturing method for an LDMOS integrated device, a provided semiconductor substrate has an NLDMOS area and a PLDMOS area; then a dielectric layer on the NLDMOS area and a dielectric layer on the PLDMOS area are formed on the semiconductor substrate, and a stress material layer is formed on the dielectric layer on the NLDMOS area and/or on the dielectric layer on the PLDMOS area, the thickness of the dielectric layer on the NLDMOS region being greater than the thickness of the dielectric layer on the PLDMOS region; then heat treatment is performed to adjust the stress of the stress material layer, so as to improve the electron mobility of a device; then the stress material layer is removed.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile