Memory cell and manufacturing method thereof, three-dimensional memory and operation method thereof

Abstract

A memory cell and manufacturing method thereof, and a three-dimensional memory and an operation method thereof. The memory cell includes: a stack on a substrate and including: channel holes passing through the stack and part of the substrate, the stack including the second stack material layer which is etched to form a ring-shaped limiting component; a gate dielectric layer on a surface of the channel holes with the ring-shaped limiting component; a channel layer on a surface of the gate dielectric layer; and a variable resistance layer on a surface of the channel layer corresponding to the ring-shaped limiting component, where a gate voltage applied to the second stack material layer and a pulse signal applied to a bit line connected to the channel layer are controlled to change a resistance state of the variable resistance layer, so as to perform reading, writing or erasing on the variable resistance layer.