The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 20, 2026

Filed:

Jan. 19, 2023
Applicant:

Changxin Memory Technologies, Inc., Hefei City, CN;

Inventor:

Xiaoguang Wang, Hefei, CN;

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10B 61/00 (2023.01); H10D 30/67 (2025.01); H10D 62/10 (2025.01); H10N 50/01 (2023.01); H10N 50/10 (2023.01); H10W 20/41 (2026.01);
U.S. Cl.
CPC ...
H10B 61/22 (2023.02); H10D 30/6757 (2025.01); H10D 62/121 (2025.01); H10N 50/01 (2023.02); H10N 50/10 (2023.02); H10W 20/435 (2026.01);
Abstract

Semiconductor structure and forming method therefor are provided. The semiconductor structure includes: substrate; first vertical transistor, including first source, first channel region located on the first source, first drain located on the first channel region, and first gate dielectric layer and first gate surrounding the first channel region; first storage structure located on the first drain; second vertical transistor, including the first source, second channel region located on the first source, second drain located on the second channel region, and second gate dielectric layer and second gate surrounding the second channel region; and second storage structure located on the second drain. The first source has bottom structure, first connection structure connecting the bottom structure, the first channel region and the second channel region, and second connection structure connecting the bottom structure and located on two sides of the first channel region and the second channel region.


Find Patent Forward Citations

Wang, Xiaoguang. (2026). Semiconductor structure with vertical transistor and forming method therefor (U.S. Patent No. 12772458). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12772458

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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