Efficient hybrid-graphics pipeline

Abstract

An apparatus and method for efficiently managing jobs of a workload performed among multiple integrated circuits in separate semiconductor chips. In various implementations, a computing system includes a first processing node and a second processing node that together render and present video frame data. The graphics application holds the start of processing the next video frame until the first processing node receives result data for the current video frame from the second processing node and presents the video frame data. To remove latency, once the result data is generated, the first processing node performs a mocked present job visible to the operating system scheduler but sends no data to the display controller. The rendering of the next video frame begins, and the first processing node later presents the result data to the display controller.