Detecting potential security issues in a hardware design using register transfer level (rtl) information flow tracking

Abstract

Embodiments described herein are generally directed to detecting security issues in a hardware design using IFT. In an example, dataflows are tracked within a hardware design represented in an HDL without instrumenting the HDL. Dataflow primitives are received specifying taint sources from which the dataflows are to be tracked. A baseline simulation trace log is obtained for a baseline RTL simulation of the hardware design by causing a simulator to perform the baseline RTL simulation during which none of the taint sources are altered. Injection simulation trace logs are obtained for injection RTL simulations by causing the simulator to perform an injection RTL simulation, for each taint source, during which the taint source is altered. The dataflows are then identified based on comparisons between the baseline and the injection simulation trace logs. A potential security issue is detected within the hardware design by applying a policy to the dataflows.