The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 13, 2026

Filed:

Jan. 15, 2025
Applicant:

Semiconductor Energy Laboratory Co., Ltd., Atsugi, JP;

Inventors:

Junichi Koezuka, Tochigi, JP;

Toshimitsu Obonai, Shimotsuke, JP;

Masami Jintyou, Shimotsuga, JP;

Daisuke Kurosaki, Utsunomiya, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10W 20/48 (2026.01); H10P 14/692 (2026.01); H10P 30/20 (2026.01); H10P 95/90 (2026.01);
U.S. Cl.
CPC ...
H10W 20/48 (2026.01); H10P 14/6923 (2026.01); H10P 30/20 (2026.01); H10P 95/90 (2026.01);
Abstract

A semiconductor device having favorable electrical characteristics is provided. A semiconductor device having stable electrical characteristics is provided. A highly reliable semiconductor device is provided. The semiconductor device includes a semiconductor layer, a first insulating layer, and a first conductive layer. The semiconductor layer includes an island-shaped top surface. The first insulating layer is provided in contact with a top surface and a side surface of the semiconductor layer. The first conductive layer is positioned over the first insulating layer and includes a portion overlapping with the semiconductor layer. In addition, the semiconductor layer includes a metal oxide, and the first insulating layer includes an oxide. The semiconductor layer includes a first region overlapping with the first conductive layer and a second region not overlapping with the first conductive layer. The first insulating layer includes a third region overlapping with the first conductive layer and a fourth region not overlapping with the first conductive layer. Furthermore, the second region and the fourth region contain phosphorus or boron.


Find Patent Forward Citations

Koezuka, Junichi. (2026). Semiconductor device with impurity doped oxide semiconductor layer and method for manufacturing the semiconductor device thereof (U.S. Patent No. 12765367). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12765367

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