The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 13, 2026

Filed:

Feb. 16, 2022
Applicants:

Semileds Corporation, Chu-Nan, TW;

Shin-etsu Chemical Co., Ltd., Tokyo, JP;

Inventors:

Chen-Fu Chu, Hsinchu City, TW;

Shih-Kai Chan, Miaoli County, TW;

Yi-Feng Shih, Miaoli County, TW;

Trung Tri Doan, Hsinchu County, TW;

David Trung Doan, Hsinchu County, TW;

Yoshinori Ogawa, Kanagawa, JP;

Kazunori Kondo, Gunma, JP;

Toshiyuki Ozai, Gunma, JP;

Nobuaki Matsumoto, Gunma, JP;

Taichi Kitagawa, Gunma, JP;

Assignees:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10H 20/01 (2025.01); H10H 20/812 (2025.01); H10H 20/84 (2025.01);
U.S. Cl.
CPC ...
H10H 20/018 (2025.01); H10H 20/84 (2025.01); H10H 20/01335 (2025.01); H10H 20/034 (2025.01); H10H 20/812 (2025.01);
Abstract

A method for fabricating semiconductor light emitting devices (LEDs) includes forming a plurality of light emitting diode (LED) structures having sidewall P-N junctions on a growth substrate, and forming an isolation layer on the light emitting diode (LED) structures having corners at intersections of the epitaxial structures with the growth substrate. The method also includes forming an etchable covering channel layer on the isolation layer, forming a patterning protection layer on the covering channel layer, forming etching channels in the covering channel layer using a first etching process, and removing the corners of the isolation layer by etching the isolation layer using a second etching process. Following the second etching process the isolation layer covers the sidewall P-N junctions. The method can also include bonding the growth substrate to a carrier and separating the growth substrate from the light emitting diode (LED) structures using a laser lift off (LLO) process.


Find Patent Forward Citations

Chu, Chen-Fu. (2026). Method to remove an isolation layer on the corner between the semiconductor light emitting device to the growth substrate (U.S. Patent No. 12765120). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12765120

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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