The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 13, 2026
Filed:
Jul. 30, 2024
Applicant:
Arm Limited, Cambridge, GB;
Inventors:
Mohit Chanana, Noida, IN;
Andy Wangkun Chen, Austin, TX (US);
Yew Keong Chong, Austin, TX (US);
Vivek Asthana, Greater Noida, IN;
Himanshu Rathore, Noida, IN;
Abhishek Kumar, Noida, IN;
Assignee:
Arm Limited, Cambridge, GB;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/0175 (2006.01); H03K 19/20 (2006.01);
U.S. Cl.
CPC ...
H03K 19/017509 (2013.01); H03K 19/20 (2013.01);
Abstract
Briefly, example apparatuses, articles of manufacture, and/or techniques are disclosed that may be implemented, in whole or in part, to implement, facilitate and/or support integrated circuits comprising Boolean logic gate circuitry and corresponding voltage level shifting circuitry.
Chanana, Mohit. (2026). Multiple or single voltage domain logic gate circuitry (U.S. Patent No. 12763771). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12763771
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile