The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 12762315 B1

Date of Patent:

Oct. 13, 2026

Filed:

Dec. 01, 2021

Identifying potential improvement opportunities for simulation performance of an integrated circuit design

Applicant:

Synopsys, Inc., Mountain View, CA (US);

Inventors:

Gaurav Kumar Verma, Fremont, CA (US);

Krishna Menon Mathilakath, Portland, OR (US);

Mayank Gupta, Cupertino, CA (US);

Vivek Gaur, Marlborough, MA (US);

Assignee:

Synopsys, Inc., Sunnyvale, CA (US);

Attorney:

Patterson + Sheridan, LLP

Primary Examiner:

Kamini S Shah

Int. Cl.

CPC ...

G06F 30/39 (2020.01); G06F 30/323 (2020.01); G06F 30/3308 (2020.01); G06F 16/532 (2019.01); G06F 30/30 (2020.01);

U.S. Cl.

CPC ...

G06F 30/3308 (2020.01); G06F 30/323 (2020.01); G06F 30/39 (2020.01); G06F 16/532 (2019.01); G06F 30/30 (2020.01);

Abstract

Techniques for improved analysis and simulation of an IC design are disclosed. Simulation activity for an integrated circuit (IC) design is identified using one or more processors. One or more potential improvements to a simulation of the IC design are generated based on the simulation activity, the one or more potential improvements relating to at least one of signal activity or process activity, during simulation, reflected in the simulation activity. A hardware description language (HDL) design file corresponding to the IC design is modified to indicate the one or more potential improvements to the simulation.

Find Patent Forward Citations

Verma, Gaurav. (2026). Identifying potential improvement opportunities for simulation performance of an integrated circuit design (U.S. Patent No. 12762315). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12762315

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