The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 13, 2026

Filed:

Feb. 10, 2025
Applicant:

Ememory Technology Inc., Hsin-Chu, TW;

Inventors:

Hsueh-Wei Chen, Hsinchu County, TW;

Cheng-Yu Chung, Hsinchu County, TW;

Woan-Yun Hsiao, Hsinchu County, TW;

Assignee:

eMemory Technology Inc., Hsin-Chu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10B 41/70 (2023.01); G05F 1/56 (2006.01); G11C 16/04 (2006.01); G11C 16/10 (2006.01); G11C 16/14 (2006.01); G11C 16/26 (2006.01); H10B 41/35 (2023.01);
U.S. Cl.
CPC ...
G05F 1/56 (2013.01); G11C 16/045 (2013.01); G11C 16/10 (2013.01); G11C 16/14 (2013.01); G11C 16/26 (2013.01); H10B 41/35 (2023.02); H10B 41/70 (2023.02);
Abstract

An erasable programmable non-volatile memory cell includes an isolation structure, a first P-well region, a second P-well region, an N-type isolation region, a first gate structure, a second gate structure, a first merged doped region, a second merged doped region, a third merged doped region and a fourth merged doped region. The isolation structure is formed on a P-type semiconductor substrate. The first gate structure and the second gate structure are formed on the surface of the P-type semiconductor substrate corresponding to the first region. An area the P-type semiconductor substrate corresponding to the first region are divided into a first merged doped region, a second merged doped region and a third merged doped region. The fourth merged doped region is formed in the P-type semiconductor substrate corresponding to the second region.


Find Patent Forward Citations

Chen, Hsueh-Wei. (2026). Erasable programmable non-volatile memory cell (U.S. Patent No. 12761676). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12761676

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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