The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 06, 2026

Filed:

Aug. 21, 2023
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Cheol Kim, Suwon-si, KR;

Seokhyun Lee, Suwon-si, KR;

Seokgeun Ahn, Suwon-si, KR;

Hwanyoung Choi, Suwon-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10W 70/65 (2026.01); H10W 70/60 (2026.01); H10W 70/655 (2026.01); H10W 70/656 (2026.01); H10W 70/68 (2026.01); H10W 70/685 (2026.01); H10W 70/69 (2026.01); H10W 74/10 (2026.01); H10W 90/00 (2026.01);
U.S. Cl.
CPC ...
H10W 70/65 (2026.01); H10W 70/685 (2026.01); H10W 70/69 (2026.01); H10W 74/111 (2026.01); H10W 90/00 (2026.01); H10W 70/60 (2026.01); H10W 70/655 (2026.01); H10W 70/656 (2026.01); H10W 70/682 (2026.01); H10W 90/722 (2026.01); H10W 90/724 (2026.01); H10W 90/794 (2026.01);
Abstract

A semiconductor package includes a first redistribution structure including a top surface, a chip arranged on the top surface of the first redistribution structure the chip having a top surface, bottom surface, and side surfaces, and a package body arranged on the top surface of the first redistribution structure to cover the side surfaces of the chip. The first redistribution structure includes a plurality of redistribution layers stacked in a vertical direction, a plurality of redistribution insulating layers stacked in the vertical direction and which insulate the plurality of redistribution layers from each other, a plurality of redistribution vias buried in a plurality of redistribution via holes penetrating the plurality of redistribution insulating layers and electrically connecting the plurality of redistribution layers to each other, and a plurality of self-formed barrier layers formed between side surfaces of the plurality of redistribution layers and the plurality of redistribution insulating layers.


Find Patent Forward Citations

Kim, Cheol. (2026). Semiconductor package (U.S. Patent No. 12757763). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12757763

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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