The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 06, 2026

Filed:

Jul. 29, 2023
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Ruilong Xie, Niskayuna, NY (US);

Albert M. Chu, Nashua, NH (US);

Brent A. Anderson, Jericho, VT (US);

Lawrence A. Clevenger, Saratoga Springs, NY (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10D 30/67 (2025.01); H10D 30/01 (2025.01); H10D 30/43 (2025.01); H10D 62/10 (2025.01); H10D 64/01 (2025.01); H10D 84/01 (2026.01); H10D 84/03 (2025.01); H10D 84/83 (2025.01); H10W 20/20 (2026.01);
U.S. Cl.
CPC ...
H10D 30/6729 (2025.01); H10D 30/014 (2025.01); H10D 30/43 (2025.01); H10D 30/6735 (2025.01); H10D 30/6757 (2025.01); H10D 62/121 (2025.01); H10D 64/017 (2025.01); H10D 64/021 (2025.01); H10D 84/0128 (2025.01); H10D 84/013 (2025.01); H10D 84/0147 (2025.01); H10D 84/0149 (2025.01); H10D 84/038 (2025.01); H10D 84/83 (2025.01); H10W 20/20 (2026.01);
Abstract

A semiconductor device includes a plurality of gate caps over a plurality of gate regions, gate spacers over sidewalls of the plurality of gate regions and the plurality of gate caps, a backside contact under a first source and drain region and a dielectric cap over the first source and drain region. The first source and drain region is located between two adjacent gate regions of the plurality of gate regions.


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