The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 06, 2026

Filed:

Jun. 20, 2024
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Shyam Sunder Raghunathan, Woodlands, SG;

Akira Goda, Setagaya, JP;

Kishore K. Muchherla, San Jose, CA (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 16/16 (2006.01); G11C 16/04 (2006.01); G11C 16/26 (2006.01);
U.S. Cl.
CPC ...
G11C 16/16 (2013.01); G11C 16/26 (2013.01); G11C 16/0483 (2013.01);
Abstract

An apparatus can comprise a memory array comprising multiple erase blocks coupled to a same plurality of strings of memory cells. Control circuitry can be configured to: receive a command corresponding to a sensing operation to be performed on a selected access line of a first group of access lines corresponding to a first erase block; and determine an adjusted sense voltage to be applied to the selected access line in association with performing the sensing operation. The adjusted sense voltage is based on: a quantity of the first group of access lines that are programmed; or a quantity of the second group of access lines that are programmed; or both.


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