The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 06, 2026

Filed:

Aug. 23, 2024
Applicant:

D2s, Inc., San Jose, CA (US);

Inventors:

Donald Oriordan, Sunnyvale, CA (US);

Akira Fujimura, Saratoga, CA (US);

Assignee:

D2S, INC., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G03F 1/70 (2012.01); G03F 1/36 (2012.01); G03F 1/72 (2012.01); G03F 7/00 (2006.01); G06F 30/367 (2020.01); G06F 30/398 (2020.01); G06F 119/18 (2020.01); G06F 119/22 (2020.01);
U.S. Cl.
CPC ...
G03F 1/70 (2013.01); G03F 1/36 (2013.01); G03F 1/72 (2013.01); G03F 7/70441 (2013.01); G03F 7/705 (2013.01); G06F 30/398 (2020.01); G03F 7/70633 (2013.01); G06F 30/367 (2020.01); G06F 2119/18 (2020.01); G06F 2119/22 (2020.01);
Abstract

Some embodiments provide a method for optimizing a mask layout for producing masks for manufacturing an integrated circuit (IC) by defining multiple layers of components on a substrate. The method generates, based on a first mask layout, a simulated wafer image including representations of IC components that are predicted to be manufactured for a first layer of the IC based on a received mask layout for the first layer. The method compares the simulated wafer image to a target wafer image including optimal representations of the IC components for the first layer. The comparison uses data regarding locations of components in at least one additional layer that interact with components in the first layer. Based on the comparison, the method modifies the first mask layout to generate a modified second mask layout for the first layer.


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