The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 29, 2026

Filed:

May. 22, 2023
Applicant:

Marvell Asia Pte Ltd, Singapore, SG;

Inventors:

Janak Patel, South Burlington, VT (US);

Richard S Graf, Gray, ME (US);

David M. Bond, Apex, NC (US);

Assignee:

Marvel Asia Pte Ltd, Singapore, SG;

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10W 40/22 (2026.01); H10W 70/60 (2026.01); H10W 72/20 (2026.01); H10W 74/10 (2026.01); H10W 90/00 (2026.01); H10W 72/00 (2026.01); H10W 74/00 (2026.01);
U.S. Cl.
CPC ...
H10W 40/228 (2026.01); H10W 70/614 (2026.01); H10W 72/20 (2026.01); H10W 74/117 (2026.01); H10W 90/00 (2026.01); H10W 90/701 (2026.01); H10W 72/856 (2026.01); H10W 74/00 (2026.01); H10W 90/736 (2026.01);
Abstract

An electronic device includes: (a) a die, including: a first surface having electronic components formed thereon, a second surface opposite the first surface, and first thermal vias (TVs) traversing through the die between the first and second surfaces, the first TVs being: arranged in a first layout, and configured to dissipate heat generated by operation of the electronic components, (b) a carrier substrate, facing the second surface, the carrier substrate including second TVs traversing between first and second outer surfaces of the carrier substrate, the second TVs being: arranged in a second layout different from the first layout, and configured to transfer at least some of the heat between the first and second outer surfaces, and (c) a heat dissipation layer, formed between the die and the carrier surface, and configured to connect and transfer at least some of the heat between the first TVs and the second TVs.


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