The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 22, 2026

Filed:

Apr. 18, 2025
Applicant:

Nvidia Corporation, Santa Clara, CA (US);

Inventors:

Dawid Stanislaw Pajak, San Carlos, CA (US);

Lachlan Francis Dowling, Bend, OR (US);

Nan Wang, San Jose, CA (US);

Rohit Goel, Noida, IN;

Assignee:

NVIDIA Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/02 (2006.01); G06F 9/50 (2006.01); G06F 12/14 (2006.01); G06F 13/16 (2006.01);
U.S. Cl.
CPC ...
G06F 12/0246 (2013.01); G06F 9/5016 (2013.01); G06F 12/1491 (2013.01); G06F 13/1642 (2013.01); G06F 13/1673 (2013.01);
Abstract

Various examples, systems, and methods relate to facilitating memory use by a hardware accelerator. A system can check whether an on-chip memory region has already been set up for a given use. If it has, the system can reuse it. If not, the system can allocate a new region and connect it to a larger off-chip memory. The system can determine whether to load data into on-chip memory or save data back to off-chip memory based on various rules.


Find Patent Forward Citations

Pajak, Dawid. (2026). Firmware-controlled memory binding and implicit data persistence for hardware accelerators (U.S. Patent No. 12743372). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12743372

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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