The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 15, 2026

Filed:

May. 22, 2023
Applicant:

Taiwan Semiconductor Manufacturing Company Limited, Hsinchu, TW;

Inventors:

Yun-Feng Kao, New Taipei City, TW;

Katherine H. Chiang, New Taipei City, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 87/00 (2026.01); H10D 86/01 (2026.01);
U.S. Cl.
CPC ...
H10D 87/00 (2025.01); H10D 86/01 (2025.01);
Abstract

A method of forming a semiconductor circuit includes forming an electrically insulating structure having a slab geometry including a first surface and a second surface that are parallel to one another and that are each oriented in respective planes that are perpendicular to a thickness direction. A p-type semiconductor layer is formed on the first surface, an n-type semiconductor layer is formed on the second surface, a gate dielectric layer formed is in contact with the p-type semiconductor layer and the n-type semiconductor layer, a gate electrode is formed in contact with the gate dielectric layer, a first source electrode and a first drain electrode are formed in contact with the p-type semiconductor layer, and a second source electrode and a second drain electrode are formed in contact with the n-type semiconductor layer.


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