The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 15, 2026

Filed:

Sep. 21, 2023
Applicant:

Applied Materials, Inc., Santa Clara, CA (US);

Inventors:

Nicolas Louis Breil, San Jose, CA (US);

Balasubramanian Pranatharthiharan, San Jose, CA (US);

Assignee:

Applied Materials Inc., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10D 30/69 (2025.01); H10D 30/01 (2025.01); H10D 30/43 (2025.01); H10D 30/67 (2025.01); H10D 62/10 (2025.01); H10D 64/01 (2025.01); H10D 84/01 (2026.01); H10D 84/03 (2025.01); H10D 84/83 (2025.01); H10P 14/20 (2026.01);
U.S. Cl.
CPC ...
H10D 30/751 (2025.01); H10D 30/014 (2025.01); H10D 30/43 (2025.01); H10D 30/6735 (2025.01); H10D 30/6757 (2025.01); H10D 62/121 (2025.01); H10D 64/017 (2025.01); H10D 84/0128 (2025.01); H10D 84/0135 (2025.01); H10D 84/038 (2025.01); H10D 84/83 (2025.01); H10P 14/3411 (2026.01);
Abstract

A method for forming a gate structure uses epitaxial growth to form the layers of the gate structure. The method includes epitaxially growing a first silicon germanium layer with a first germanium percentage on a silicon substrate, growing a first silicon layer on the first silicon germanium layer, growing a second silicon germanium layer with a second germanium percentage greater than the first germanium percentage, growing a second silicon layer on the second silicon germanium layer, selectively etching a portion of the first silicon germanium layer to form a recess; selectively depositing a low-k dielectric material to fill the recess, and selectively oxidizing the second silicon germanium layer throughout to form a silicon germanium oxide layer.


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