The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 08, 2026

Filed:

Nov. 11, 2022
Applicant:

Hitachi Power Semiconductor Device, Ltd., Ibaraki, JP;

Inventors:

Masaki Shiraishi, Hitachi, JP;

Daisuke Kawase, Hitachi, JP;

Tetsuo Oda, Hitachi, JP;

Tomoyasu Furukawa, Tokyo, JP;

Yutaka Kato, Hitachi, JP;

Tsubasa Moritsuka, Hitachi, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 64/00 (2025.01); H02M 7/5387 (2007.01); H10D 62/10 (2025.01);
U.S. Cl.
CPC ...
H10D 64/111 (2025.01); H02M 7/5387 (2013.01); H10D 62/107 (2025.01);
Abstract

The present invention provides: a semiconductor device which has higher resistance to bias at high temperatures and high humidities than ever before, while achieving good connection between a field limiting layer and a field plate; and a power conversion device which uses this semiconductor device. A semiconductor device according to the present invention is characterized by comprising a floating field limiting layer that is provided in a termination region and a field plate that is electrically connected to the field limiting layer, and is also characterized in that: the field plate is formed of a polysilicon; the field plate and the field limiting layer are connected to each other via an Al electrode; and the connection between the field limiting layer and the Al electrode and the connection between the field plate and the Al electrode are established at different contacts.


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