Methods for forming devices with shallow source/drain contacts

Abstract

The present disclosure is generally related to semiconductor devices, and more particularly to field-effect transistors (FETs). A substrate includes fin-like protruding portions in which source/drain regions are formed on the fin-like protruding portions of the substrate. The source/drain regions are laterally adjacent and electrically coupled to the nanostructure channels. A dielectric material is partially filling spaces between the fin-like protruding portions and partially are coupled to the source/drain regions. A barrier layer is on the dielectric material and covers portions of the source/drain regions. A source/drain contact is formed in the barrier layer and is partially in contact with the source/drain regions. The barrier layer and the dielectric material that formed below the MD contact in spaces between the source/drain regions result in a reduction of parasitic capacitance of the metal contacts such as gate-drain capacitance (C).